![]() This enable signal in a good compiler should be wired up to the enable port of the FF.The compiler infers that from the location of the signal construct(not its name!, you may even insert your construct directly instead of explicit signal). Yes indeed, every FF is to be clocked by the 50MHz as usual but every FF meant to run at 1MHz needs the enable signal as well. In accordance with your post, I wrote the following code,could tell me is it right?is it the enable clock divider? THX very much. Obviously, you don't need to do this if your design doesn't violate the 50MHz. ![]() Then use this enable pulse together with your 50MHz clk to enable your work at 1MHz.Īdditionally, you may add a multicycle of 50 to your logic timing constraints since the required speed is now just 1MHz. Generate a single enable pulse when count say = 49. Use a counter running continuously on your 50MHz clk from 0 to 49 and back.
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